Computing devices, such as notebook computers, personal data assistants (PDAs), and mobile handsets, have user interface devices, which are also known as human interface device (HID). One user interface device that has become more common is a touch-sensor pad. A basic notebook touch-sensor pad emulates the function of a personal computer (PC) mouse. A touch-sensor pad is typically embedded into a PC notebook for built-in portability. A touch-sensor pad replicates mouse x/y movement by using two defined axes which contain a collection of sensor elements that detect the position of a conductive object, such as a finger. Mouse right/left button clicks can be replicated by two mechanical buttons, located in the vicinity of the touchpad, or by tapping commands on the touch-sensor pad itself. The touch-sensor pad provides a user interface device for performing such functions as positioning a pointer, or selecting an item on a display. These touch-sensor pads may include multi-dimensional sensor arrays for detecting movement in multiple axes. The sensor array may include a one-dimensional sensor array, detecting movement in one axis. The sensor array may also be two dimensional, detecting movements in two axes.
Another user interface device that has become more common is a touch screen. Touch screens, also known as touchscreens, touch panels, or touchscreen panels are display overlays which are typically either pressure-sensitive (resistive), electrically-sensitive (capacitive), acoustically-sensitive (SAW—surface acoustic wave) or photo-sensitive (infra-red). The effect of such overlays allows a display to be used as an input device, removing the keyboard and/or the mouse as the primary input device for interacting with the display's content. Such displays can be attached to computers or, as terminals, to networks. There are a number of types of touch screen technology, such as optical imaging, resistive, surface wave, capacitive, infrared, dispersive signal, and strain gauge technologies. Touch screens have become familiar in retail settings, on point of sale systems, on ATMs, on mobile handsets, on game consoles, and on PDAs where a stylus is sometimes used to manipulate the graphical user interface (GUI) and to enter data.
FIG. 1A illustrates a conventional touch-sensor pad. The touch-sensor pad 100 includes a sensing surface 101 on which a conductive object may be used to position a pointer in the x- and y-axes, or to select an item on a display. Touch-sensor pad 100 may also include two buttons, left and right buttons 102 and 103, respectively. These buttons are typically mechanical buttons, and operate much like a left and right button on a mouse. These buttons permit a user to select items on a display or send other commands to the computing device.
FIG. 1B illustrates a conventional linear touch-sensor slider. The linear touch-sensor slider 110 includes a surface area 111 on which a conductive object may be used to position a pointer in the x-axes (or alternatively in the y-axes). The construct of touch-sensor slider 110 may be the same as that of touch-sensor pad 100. Touch-sensor slider 110 may include a one-dimensional sensor array. The slider structure may include one or more sensor elements that may be conductive traces. Each trace may be connected between a conductive line and a ground. By being in contact or in proximity on a particular portion of the slider structure, the capacitance between the conductive lines and ground varies and can be detected. The capacitance variation may be sent as a signal on the conductive line to a processing device. For example, by detecting the capacitance variation of each sensor element, the position of the changing capacitance can be pinpointed. In other words, it can be determined which sensor element has detected the presence of the conductive object, and it can also be determined the motion and/or the position of the conductive object over multiple sensor elements.
One difference between touch-sensor sliders and touch-sensor pads may be how the signals are processed after detecting the conductive objects. Another difference is that the touch-sensor slider is not necessarily used to convey absolute positional information of a conducting object (e.g., to emulate a mouse in controlling pointer positioning on a display) but, rather, may be used to actuate one or more functions associated with the sensing elements of the sensing device.
FIG. 1C illustrates a conventional sensing device having three touch-sensor buttons. Conventional sensing device 120 includes button 121, button 122, and button 123. These buttons may be capacitive touch-sensor buttons. These three buttons may be used for user input using a conductive object, such as a finger.
In general, capacitive touch sensors are intended to replace mechanical buttons, knobs, and other similar mechanical user interface controls. Capacitive sensor allows eliminating the complicated mechanical switches and buttons, providing the reliable operation under harsh conditions. Also, capacitive sensors are widely used in the modern customer applications, providing new user interface options in the existing products.
Many conventional methods exist for capacitance sensing or measuring. Some conventional methods have been briefly described below.
FIG. 1D illustrates a conventional relaxation oscillator for capacitance measurement. The relaxation oscillator 150 is formed by the capacitance to be measured on capacitor 151, a charging current source 152, a comparator 153, and a reset switch 154. It should be noted that capacitor 151 is representative of the capacitance measured on a sensor element of a sensor array. The relaxation oscillator is coupled to drive a charging current (Ic) 157 in a single direction onto sensing capacitor Cx, capacitor 151.
FIG. 1E illustrates a variant of the conventional relaxation oscillator of FIG. 1D. In this case, the dedicated reset switch is not used. Relaxation oscillator 160 includes a hysteresis comparator 153, and inverter 161. Comparator 153 operates as similar to the comparator describe above. The inverter 161 is configured to control the switches 162, which are configured to charge and discharge of the sensor element (e.g., capacitor 151).
Using either conventional relaxation oscillators described above, the capacitance change causes the output frequency variation, which can be easily detected, such as using a digital counter. The disadvantage of using these conventional relaxation oscillators is that they operate at a fixed frequency and include high-impedance signal paths (for example, current source that charges small sensing capacitor Cx.
FIG. 1F illustrates another conventional method for measuring capacitance is by phase shift measurement. The circuit 170 includes a voltage source, resistor, and phase shift meter, which are coupled to the capacitance sensor element. The changing of the capacitance on the sensor element varies the phase shift between a reference signal and a measured signal. The output of the phase shift meter can be converted to a code. Driving the capacitance through a fixed-value resistor yields voltage and current waveforms that are out of phase by a predictable amount. The drive frequency can be adjusted to keep the phase measurement in a readily measured range.
FIG. 1G illustrates another conventional capacitance measurement scheme based on charging the sensor capacitor from constant current source. Circuit 180 includes a comparator, a constant current source, and a time measurement circuit, such as a counter or a timer. In this conventional design, the capacitor is charged from the constant current source, and the time required for getting the demanded threshold voltage is measured by using the counter or timer. Another similar conventional capacitance sensing device based on charging the sensor capacitor from constant current source charges and discharges the capacitor using the constant current source. A description of this type of conventional design can be found in U.S. Pat. No. 5,294,889.
FIG. 1H illustrates a conventional capacitive voltage divider circuit 190 for capacitance sensing. Capacitive voltage divider. Multiple implementations are possible for the capacitive voltage divider circuit, but FIG. 1H illustrates only one of these implementations. The circuit includes an AC source and two capacitors connected in series. In this case, the voltage on sensing capacitor is inversely proportional to the capacitance. Also, illustrated in FIG. 1H, is a method for measuring the capacitance on the capacitance voltage divider circuit using a peak detector 191, as described in U.S. Pat. No. 5,572,205. The voltage can be measured using the synchronous demodulator, peak detector, root mean square (RMS) detector, or other suitable technique. FIG. 1H includes a conventional peak detector circuit 191 for measuring the voltage. It should be noted that in some implementations where a DC source is used instead AC source, the capacitors should be reset before DC voltage applying using some switches.
Two other conventional capacitive measuring schemes are the resistor-capacitor charge timing, capacitive bridge divider. The resistor-capacitor charge timing may include charging the capacitor through a fixed resistor and measuring timing on the voltage ramp. Small capacitor values may require very large resistors for reasonable timing. The capacitive bridge divider may include driving the capacitor under test through a fixed reference capacitor. The reference capacitor and the capacitor under test form a voltage divider. The voltage signal is recovered with a synchronous demodulator, which may be done in a processing device.
Another class of methods for measuring capacitance on a sensor element is switching capacitor methods. In these methods, the sensing capacitor is charged at one phase and is discharged to some charge reception device at a second stage. A subclass of this class is charge accumulation. Methods of charge accumulation methods include transferring charge accumulated on the sensing capacitor to the charge-accumulation capacitor or integrator with capacitor in the feedback loop. These methods may have a key advantage in that charge-accumulation circuits have low sensitivity for radio-frequency (RF) fields and noise because the sensing capacitor is charged from a low-impedance source and charge is transferred to a low-impedance accumulator (e.g., integrator capacitor or charge-accumulation capacitor).
FIG. 1I illustrates a conventional charge-accumulation circuit 192. The conventional charge-accumulation circuit 192 includes the sensing circuit 194, the integration capacitor 195, switches 196 and 197, and the voltage source 193. The conventional charge-accumulation circuit 192 is described in U.S. Pat. No. 5,730,165. Switches SW1 and SW2 196 are operating in the non-overlapping way, providing series of sensing capacitor Cx 194 cycles. Capacitance measurement is implemented in the several steps. First, the integration capacitor Cint 195 is reset in the initial stage by using the some external switch Sw3 197. Next, the switches Sw1, Sw2 196 start to operate in two non-overlapping phases, providing charge-discharge cycles to the sensing capacitor Cx 194. Consequently, the integration capacitor Cint 195 voltage starts rising. The sensed capacitance value is determined by measuring number of cycles, required for the voltage accumulated on the integration capacitor Cint 195 to a reference threshold voltage or by measuring the voltage on the integration capacitor Cint 195 after a predefined number of charge transfer cycles. In the conventional method, the voltage on the integration capacitor Cint 195 is represented by the following Equation (1):
                              V                      C            ⁢                                                  ⁢            int                          =                              V            dd                    ⁡                      (                          1              -                              e                                                      -                    N                                    ⁢                                                            C                      x                                                              C                      int                                                                                            )                                              (        1        )            where the term VCint is the voltage on the integration capacitor Cint 195, the term N is the cycle count, the term Cx is the sensing capacitance value, the term Cint is the integrator capacitor value, and the term Vdd is the power supply voltage.
FIG. 1J illustrates another conventional charge-accumulation circuit 198, including an integrator. Charge-accumulation circuit 198 is described in U.S. Pat. No. 6,323,846. The charge-accumulation circuit 198 of FIG. 1J operates similarly to the charge-accumulation circuit 192 of FIG. 1I; however, the integration capacitor voltage rises in the linear way with respect to the number of cycles by placing the integration capacitor in the feedback of an operational amplifier.
FIG. 1K illustrates another conventional charge-accumulation circuit 199, including an integrating low-pass filter. Charge-accumulation circuit 198 is described in U.S. Pat. No. 6,323,846. The charge-accumulation circuit 199 of 90
The charge-accumulation circuit 199 of FIG. 1K operates similarly to the charge-accumulation circuit 192 of FIGS. 1I and 198 of FIG. 1J; however, the charge-accumulation circuit 199 operates as capacitance to the voltage converter of the integrating low-pass filter output voltage that is measured by an analog-to-digital (ADC). The conventional charge-accumulation circuit 199 of FIG. 1K requires an additional ADC, which increases the total system complexity and cost. Furthermore, the additional ADC may introduce additional noise, such as quantization noise. Also, an additional operation amplifier is required for the integrator that increases the total cost of implementation.
FIG. 1L illustrates another switching capacitor design, called the successful approximation. Switches SW1 and SW2 and the capacitance sensor CX form a switched capacitor network with an equivalent circuit of a resistor to ground. With the iDAC set to a calibrated level, and SW1 and SW2 switching, the average voltage on CMOD settles at a level that varies with the value of capacitance on the capacitance sensor Cx. Setting the iDAC to a low current level with SW2 open, the voltage on CMOD ramps up. The time for the ramp voltage on CMOD to reach VREF is an indication of the value of Cx. The timer on the output of the comparator converts the ramp time to a digital value. Self-calibration of the system is accomplished through a successive approximation binary search to determine iDAC setting necessary to keep voltage on CMOD at VREF when no finger is present. Individual calibrated iDAC settings are stored for all sensors. When a finger is present, the voltage on CMOD settles at a lower voltage, requiring more time to reach the threshold voltage VREF, as shown in FIG. 1M. If (t2−t1) is long enough, the button state is in finger present state, otherwise the button is in the finger absent state.
Other convention charge-accumulation circuits are described in U.S. Pat. No. 6,888,536, U.S. Pat. No. 6,288,707, U.S. Pat. No. 6,570,557, U.S. Pat. No. 6,535,200, U.S. Pat. No. 6,466,036, and U.S. Pat. No. 6,452,514.
The conventional charge-accumulation circuits and methods described above operate in a cycle-based mode (e.g., FIGS. 1I and 1J), including resetting, integrating, measuring. The cycle-based mode does not allow flexibility in changes to the conversion time. The cycle-based mode also does not allow for tracking dynamic capacitance changes, which are common in game accessories, for example.
Most conventional charge accumulation methods have several stages that are executed in series: reset, integrate, and measure. Therefore, in order to track the faster capacitance changes, the conversion time can be reduced by using smaller integration capacitor, which reduces the accuracy as well. Also, the conventional charge accumulation methods cannot provide its output to different digital filters at the same time.
Another conventional charge accumulation design includes a sigma-delta modulator for capacitance measurement, as described in U.S. Pat. No. 6,970,126. This design is illustrated in FIG. 1N. This modulator includes the switching signal generator 59 that forms the phase switching signals. These signals are used for setting the sensing capacitor drive switches 86 and 88 for setting levels Vh and Vl during different phases. The sensing capacitor c_sensor is placed between the excitation source switches 86 and 88 and the modulator input switches 44 and 46. The excitation source switches 86 and 88 and the modulator input switches 44 and 46 are controlled by the switching signal generator 59f. The output of the modulator is feedback to the voltage reference 30f to control the polarity of the reference voltage applied to the reference capacitor Cref 24f. The sensing capacitor c_sensor 90f is not in the feedback loop of the modulator. The sensing capacitor charge is integrated using the differential integrator 20 and passed to the zero-cross detector comparator 12. The zero cross detector comparator controls the reference capacitor switching using switches 32/34 and controlled reference voltage source Vref+. The modulator bitstream is passed to the digital filter. The disadvantages of this conventional solution are that this design requires a dual electrode system with excitation source, and the hardware complexity. The two-electrode system requires one wire for exciting the sensing capacitor (e.g., excitation bus) and one wire for sensing the capacitance (e.g., sense line). This design cannot work in a single wire configuration. Also, the full-scale range of this conventional solution is set by using the reference capacitor Cref value. This makes design less useful for applications when the full scale should be changed dynamically during device operation or large capacitance values need to be measured, taking into account that capacitors require more die space during IC manufacturing. This design requires a multiphase clock source, multiple switches, a differential integrator, a comparator, etc., which increase the hardware complexity, as well as the die space and overall cost of the end design.